Proposed Changes to DCPU-Specification

• Promote PC,SP and O to proper Registers, add register K
• allows for [SP+x]
• Stack operations as extended opcodes, PEEK is still possible as [SP]
• add negative literals to allow short jumps

Values: (6 bits)

• 0x00-0x0b register (A,B,C, X,Y,Z, I,J,K, PC,SP or Overflow; in that order)
• 0x0c-0x17 [register]
• 0x18-0x23 [register + next_word]
• 0x24 [next_word]
• 0x25 next_word
• 0x26-0x2f literal -10 to -1 (literal or offset for Short jump)
• 0x30-0x3f literal 0 to 15

0x25-0x3f cannot be used as Left-Value

Non-basic opcodes: (6 bits)

• 0x00: reserved for future expansion
• 0x01: JSR a - pushes the address of the next instruction to the stack, then sets PC to a
• 0x02: PUSH a
• 0x03: POP a
• 0x04-0x3f: reserved

DCPU-Emulator

todo